ARTIK Family Overview ARTIK is a family of modules (ARTIK 1, ARTIK 5, ARTIK 10) tailored for the Internet of Things (IoT). With a tiered architecture built for performance, optimized power consumption and memory

Source URL: www.artik.io

The DLX Processor Architecture Registers and Memory The DLX architecture provides 32 general-purpose registers of 32 bits each that are named R0 - R31. Two of these registers have special roles: •

Source URL: www.michaelfranz.com

Evaluating the Cost of Atomic Operations on Modern Architectures Hermann Schweizer, Maciej Besta, and Torsten Hoefler Dept. of Computer Science ETH Zurich, Switzerland , .

Source URL: htor.inf.ethz.ch

• Computing
• Computer architecture
• Computer engineering
• Cache
• Computer memory
• Parallel computing
• MESI protocol
• Xeon
• Opteron
• MOESI protocol
• Intel Core
• Haswell

Object-oriented Packet Caching for ICN Yannis Thomas George Xylomenos

Source URL: conferences2.sigcomm.org

• Cache
• Computer memory
• Computer architecture
• Computing
• Computer engineering
• Computer hardware
• CPU cache
• Cache hierarchy

Notified Access: Extending Remote Memory Access Programming Models for Producer-Consumer Synchronization Roberto Belli, Torsten Hoefler Dept. of Computer Science, ETH Zurich {bellir,htor}@inf.ethz.ch

Source URL: htor.inf.ethz.ch

• Computing
• Concurrent computing
• Computer programming
• Parallel computing
• Inter-process communication
• Application programming interfaces
• Concurrency
• Message Passing Interface
• Distributed computing architecture
• Synchronization
• SHMEM
• Message queue

diploma thesis Adaptive Building Intelligence Parallel Fuzzy Controlling and Learning Architecture Based on a Temporary and Long-Term Memory

Source URL: www.kutter-fonds.ethz.ch

• Fuzzy logic
• Artificial intelligence
• Logic
• Logic in computer science
• Mathematical logic
• Theoretical computer science
• Control engineering
• Genetic fuzzy systems
• Fuzzy control system
• Genetic algorithm
• Fuzzy set
• Fuzzy markup language

Spontaneous Retrieval from Long-Term Memory for a Cognitive Architecture Justin Li and John Laird University of Michigan 2260 Hayward Street Ann Arbor, MI {justinnh, laird}@umich.edu

Source URL: justinnhli.com

Data Sharing Analysis for Titanium Ben Liblit liblit@ cs. berkeley. edu Alex Aiken

Source URL: titanium.cs.berkeley.edu

• Computing
• Concurrent computing
• Software engineering
• Parallel computing
• Type theory
• Data types
• Distributed computing architecture
• Benchmark
• Type system
• Type inference
• Consistency model
• Shared memory

Features • Low-voltage and Standard-voltage Operation • • • •

Source URL: www.atmel.com

• Microcontrollers
• Computing
• Computer hardware
• Computer architecture
• Computer memory
• IC
• EEPROM
• PIC16x84
• Atmel AVR

Hyper­Threading Considered Harmful Colin Percival Colin Percival

Source URL: www.daemonology.net

• Computing
• Cache
• Computer memory
• Computer architecture
• Computer engineering
• Cache memory
• Hyper-threading
• Pentium
• Xeon
• Thread
• CPU cache